Job Description :
Sr. FPGA HAPS DESIGN ENGINEER- FULL TIME !!
Hiring manager is looking for a Lead who can:
Interface with their customers
Drive the Development platform
Has Prototyping experience
Has done Implementation of SoC in FPGA platform
Has some Video, display exp
Exp in Design, Verification
Have HAPS experience-
Responsibilities:
Develop FPGA designs and subsystems (involving ASICs), from concept to product including:
Completing implementation in RTL, RTL/netlist verification and evaluating Xilinx Vivado synthesis and P&R results for performance and cost
Balancing performance, area, power, complexity and timing
Working closely with firmware and verification teams during specification, development, Integration and Verification phases and deliver working FPGA platforms
Skills:
Experience with RTL Development using Verilog, System Verilog, VHDL
Experience working on FPGA Design projects, including work with SOC (ARM/RISC-V CPU based), MIPI, XAUI, USB, Flash, SDIO, PCI-E, and DDR# Interfaces.
Familiarity with Synopsys (HAPS, Proto-Compiler) OR Xilinx tools/IPs for FPGA Design and implementation.
Coding, debugging skills on both UVM and FPGA Platforms
Knowledge of Debuggers like Lauterbach, J-Link, ARM-DS, Testers & Scope.
Experience in one or more of the following domains: CoreSight, SoC-400, SoC-600, OCP, AXI, ACE, AHB and APB
Familiarity with revision control concepts and tools (e.g. Subversion