Job Description :

Test (Pre/Post Silicon debug) Engineer - 

Job Title– Engineer: Test – III 

Location – Folsom California USA 95630

Duration- 6+ Months (Probability to extend)

Hours per Week: Monday-Friday

Shift: 8 AM to 5:00PM


Description:*** onsite

Product Development Engineers (PDEs) are responsible for ensuring the testability and manufacturability of integrated circuits from the design stage through production ramp. PDEs contribute significantly to design, development, and validation of testability circuits.

This includes the evaluation, development, and debug of complex test methods; developing and debugging complex software programs to convert design validation vectors and drive complex test equipment.

Creating and testing validation and production test hardware solutions. Testing, validating, and engaging with design to guarantee component margin to specification.

Analyzing and evaluating component specification versus performance to ensure an optimal match of component requirements with production equipment capability.

Creating and applying concepts for optimizing component production relative to both quality and cost constraints.

PDEs are expected to autonomously plan and schedule their own daily tasks and develop solutions to problems utilizing formal education and judgment.

- BS in EE/CS engineering or MS in EE/CS
- At least 5 years of relevant experience
- Pre/Post silicon digital circuit level debug
- Knowledge of tester pattern conversion tools and on tester debug preferred
- Experience in Design For Test (DFT) is highly desirable

Client : Intel


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