Job Description :
Job Description

The job includes but not limited to:

Acting as a senior member of the Layout/Mask Design team
Playing a key role in development of innovative analog, RF, and mixed signal circuits and solving technical issues in different process technology nodes (28nm, 16nm, 22nm, 14nm and 10nm Performing Layout Design (Planning and Execution) of analog and Mixed Signal chip design, including but not limited to FET, cell, and block level custom layouts, auto place and route algorithms, floor planning, full chip assembly Scheduling executing and verifying complex chips development and execution of project methodologies and/or flow developments.
Automating design tasks in order to complete the design in the most efficient fashion possible

Minimum qualifications: -

Bachelors/master’s in electrical engineering-

7+ years of experience with proven record of delivering custom and high quality analog, RF, and mixed signal circuit layout-

Expertise in the following Intel and industry layout tools: GenA/Genesys, Cadence Virtuoso and Mentor Graphics

Preferred qualifications: -

3+ years of industry experience with one or more of the following: ICC2, Pcell development, APR tools, and full chip integration

Client : Altran


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