Job Description :
Qualifications:
Seeking candidates with at least 4+ years of industry experience in the following technical areas:
Physical design implementation (Floorplan, Placement, CTS, STA) in advanced technologies.
Experience with ICC/ICC2/Innovus
STA tool and timing closure methodologies
Power grid, clock tree, and low-power reduction implementation methods
Signal integrity and timing closure issues such as OCV/AOCV/Statistical Timing
Physical Verification, Conformal Low Power (CLP), IR drop analysis, Formal Verification
Programming and scripting skills (Tcl, perl and/or C)

Educational Requirements

Required: Bachelor''s, Electrical Engineering
Preferred: Master''s, Electrical Engineering

Location: San Diego, CA / Austin, TX / Bay Area, CA
             

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