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LEAD ASIC DESIGN ENGINEER
Santa Clara, CA
Santa Clara
CA
95056
Date
: Feb-10-21
2021-02-10
2022-02-10
LEAD ASIC DESIGN ENGINEER
Santa Clara, CA
Feb-10-21
Work Authorization
US Citizen
GC
H1B
EAD (OPT/CPT/GC/H4)
Preferred Employment
Corp-Corp
W2-Permanent
W2-Contract
1099-Contract
Contract to Hire
Job Details
Experience
:
Architect
Rate/Salary ($)
:
Market
Duration
:
Sp. Area
:
Others
Sp. Skills
:
Others
Permanent Direct Hire
FULL_TIME
Direct Client Requirement
Required Skills
:
Firmware, Front-End Designer
Preferred Skills
:
ASIC, DESIGN, SOC, RTL
Domain
:
Work Authorization
US Citizen
GC
EAD (OPT/CPT/GC/H4)
H1B
Preferred Employment
Corp-Corp
W2-Permanent
W2-Contract
1099-Contract
Contract to Hire
Job Details
Experience
:
Architect
Rate/Salary ($)
:
Market
Duration
:
Sp. Area
:
Others
Sp. Skills
:
Others
Permanent Direct Hire
FULL_TIME
Direct Client Requirement
Required Skills
:
Firmware, Front-End Designer
Preferred Skills
:
ASIC, DESIGN, SOC, RTL
Domain
:
HPC AMERICAS
Danville, CA
Post Resume to
View Contact Details &
Apply for Job
Job Description
:
LEAD ASIC DESIGN ENGINEER
We have the below full time position with our client in Santa Clara, CA
Pls send your resume with your salary expectation.
Position Requirements:Primary responsibilities include but are not limited to:Work with customer, vendors and internal teams from the early discussions through all phases of execution.Ensure design meets product requirements.
Lead / Contribute to microarchitecture, RTL design & integration, and Lint/CDC checks.Support verification, physical design, firmware and FPGA teams globally.Display a results-focused attitude and accomplish Company/Team-goals.Good professional design experience, having successfully led at least one project.
Strong ASIC front-end design, ideally in design services environment (product background is acceptable
Skills – Micro-architecture at module/sub-system/chip-level; digital design of complex modules/sub-systems, with solid understanding of clock-domain crossings; integration of IPs/modules/sub-systems designed by internal/external teams; experience using AMBA bus protocols; System Verilog experience; Lint and CDC analysis; timing analysis; excellent debug skills; customer support.Skills Desired - Experience in at least few of these: CPU (ARM or RISCV), or GPU, or DSP; image/video processing; low-power design and verification; interfaces such as CSI, USB, PCIe, SPI, I3C; FPGA
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