Job Posting : ITEKJP00022354- Intel
Job Title : Engineer: FPGA / RTL Design - II
Location : Hillsboro,Oregon,USA,97124
Shift : 8am-5pm
Shift Days : Monday - Friday
Contract : 3 Months (May extend depending upon the performance)
Candidate must be a Green card holder or US citizen.
Job Description:
Please note: This role will be remote and can be located in: Location: OR, AZ, SC, TX (Virtual)
Strong fundamentals in digital ASIC design; experience using Verilog/System Verilog or VHDL
• Experience with ASIC design/micro-architecture, synthesis, timing/power...Delivered RTL subsystems and/or top level SoC RTL for multiple projects
• Expertise in front end design methodologies for RTL database management, RTL partitioning, third party IP integration, lint, DFT, UPF, and synthesis
• Expertise in clock/reset design and voltage/power domain design
• Familiarity with high performance and low power design techniques
• Strong understanding of SoC integration challenges at subsystem and full chip level
• Responds to customer/client requests or events as they occur.
• Some hands-on experience in design verification and/or physical design
BA/BS degree in Electrical Engineering with 7 years of practical experience. MS in Electrical Engineering with 5 years’ experience