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Job Description :

Contract period-  6 months

Location -Hillsboro, Oregon 97124.

Client- Intel

Shift- 8am-5pm        

Job Title: ASIC Physical Designers - IV (Remote)

Required Knowledge/Skills, Education, and Experience

  •  Must possess at least 5yrs of ASIC and SoC design experience, Physical design CAD flows and Design convergence.
  • Includes synthesis, APR, STA, LVS and debug.
  • Preferred Skills: PPA experience, Synthesis and Timing analysis experience, Synopsys Fusion Compiler and/or Cadence APR, experience with ICV/Caliber, RedHawk-SC experience, scripting in PERL and Shell. Unix.
  • Communication and team skills.
  • Additional Experience needed BS +experience, MS + experience.
  • Intel component design experience preferred

100% remote; possibility of conversion
Brand new team; fast paced environment
CW will assist the IFS Leads in block level PPA including Synthesis runs, P&R, APR, Performance Verification involving static timing analysis as well as partition level APR execution to include, static timing closure, Power Delivery Network analysis, and layout verification for IFS test chips.



Client : INTEL