Job Description :
Hi,

This is Karthik from ; We are looking for FPGA Validation and Debug Engineer at Santa Clara CA the below mentioned job description. Kindly forward me your resume, Expected pay rate and contact details for further process.

Job Title : FPGA Validation and Debug Engineer
Duration : Contract
Location : Santa Clara CA

Job description :

7+ yrs. of experience
Proven track record of FPGA/ASIC verification/validation
Ability to develop and run test cases
Experience in validation of ARM, ATOM based SoC architecture
Xilinx platform and tools

Thanks & Regards
Karthik.G
.
Phone : 2 1 4 - 3 0 3 - 9 8 1 9
Email: k a r t h i k . g @ t e r m i n a l c o n t a c t s . c o m