Job Description :
Role: Mixed Signal Validation Engineers
Location: Portland, Oregon
Duration: Fulltime

Mixed Signal Validation Engineers:
In this position, you will be working as part of a pre-silicon validation t=
eam for future microprocessors and/or SoCs and will be responsible for mixe=
d signal validation in the pre-silicon environment.

Your responsibilities will include but not be limited to:
-Functional validation of products with both analog and digital components =
in them using digital and mixed signal simulation tools
-Defining and developing necessary validation infrastructure tests, checker=
s and occasional scripting in perl or unix shell to execute the validation =
plans to ensure functional correctness of the design

-Read and interpret technical specs and create high quality technical docum=
entation

-Understanding DUT specifications, digital logic and analog circuit impleme=
ntation, defining validation strategy, creating test plans

-Document validation plan and create appropriate software/content to execut=
e to the plan

The ideal candidate should exhibit behavioral traits that indicate:
-Strong problem solving
-Ability to deal with ambiguity

-Effective communication
You must possess the below minimum qualifications to be initially consider
ed for this position. Preferred qualifications are in addition to the minim

um requirements and are considered a plus factor in identifying top candida
tes. Experience listed below would be obtained through a combination of you
r school work, research and/or relevant previous job and/or internship expe
riences.

Minimum qualifications
-Must have either a BS or MS in Electrical Engineering, Computer Engineerin
g or Electrical and Computer Engineering
-2yrs experience with basic analog, mixed signal circuits
-2yrs experience with digital logic design and simulation using Verilog/VHD
L
- 1yr experience in developing verification collateral using SVTB based OVM
/UVM or Verilog/VHDL
- 1yr experience with high speed I/Os like DDR, PCI-express, USB or similar
IO interfaces

- 6mths experience with computer architecture
- 6mths experience with scripting languages like Perl and/or Shell

- 6mths experience with circuit simulation tools like Pspice and applicatio
n of circuit analysis concepts

- 2yrs experience with UNIX* or Linux*

Preferred qualifications

-6mths+ experience with Verilog-A/VHDL-A/AMS and mixed signal simulation to
ols like Cadence* AMS, Mentor* ADMS and/or their equivalent

-6mths+ industry experience in SOC/ASIC verification
-6mths+ experience in post-si debug and validation

-Working knowledge of C/C++/SystemC and other high level languages