Job Description :
Validation/Design/CAD/CAM/Verification Engineer Jobs
Send resumes to Kevin(at)bigbevy(dot)com
Send resumes to Kevin(at)bigbevy(dot)com
Send resumes to Kevin(at)bigbevy(dot)com
GENERAL INFORMATION:
Location: Bayarea, CA
Duration: 1-2 years
Job type: Contract
Pay-terms: C2C
Priority: Very High
Visa: Open
Level: Senior
Rate: $4050/hr
You can apply for one or multiple positions at the same time.
Each requirement determines specific role as per the skills and will be appointed to that particular team if shortlisted.
Required skills/experience is given under each requirement title.
REQUIREMENTS LIST:
REQUIREMENT1: Design/Validation/Verification Engineer
UVM , PCIe 6+ years exp
REQUIREMENT2: Design/Validation/Verification Engineer
UVM , Compression Logic Lz77 Algorithm experience , 6+ years
REQUIREMENT3: Design/Validation/Verification
Ethernet-MAC , UVM and 6+ years experience
REQUIREMENT4: CAD Engineer:
Develop and deploy RTL tools and methodologies for IP development; Develop and deploy software to enable IPs for Quartus; Reference Design; Reference design building through Quartus, basic validation and testing on hardware. Designs to support protocols like Pcie, Ethernet, Interlaken, CPRI etc; Other areas for contractor Requirements .
REQUIREMENT5. Design/Validation/Verification Engineer
User Mode driver (UMD) development
Hand-on experience in software distribution and installation; Hand-on experience in C/C++; Develop / port driver; Integrate UMD with AAL (Intel Accelerator Abstract Layer) interface
REQUIREMENT6. Design/Validation/Verification Engineer
Design development and FPGA integration
Hand-on experience in all C, SystemVerilog, SystemC, HLS; Hand-on experience in FPGA design
Experience with C-to-Silicon is a plus; Design accelerator logic in SV, SC, HLS; Map FPGA resources to design and close timing; Document design for SW/CSR interface, Design Spec, user guide
REQUIREMENT7. Design/Validation/Verification Engineer
Testcase development
Develop initial testcases for both driver and HW test; Work with verification team to come up with testplan to create test for PV coverage
REQUIREMENT8. Design/Validation/Verification Engineer
Simulation bring-up
Bring-up ASE simulation for a given design
REQUIREMENT9. Design/Validation/Verification Engineer
Hardware bring-up / Debug
Develop Hardware testplan; Collect hardware coverage
REQUIREMENT10 Design/Validation/Verification Engineer
6+ years ; Strong background in IP-level verification; AXI-3/4 experience; Performance benchmarking experience.