Job Description :
Title: Verification Engineers – PHY/WIFI Engineers
Location: San Jose, CA
Duration: Long term contract
Job Description:

Should have expertise on System Verilog with UVM methodology
Should have experience in developing Test Bench/architected test bench.
Experience developing test Bench components: Drivers, sequencers, monitors, Scoreboard, Assertion checks.
Should have experience on constrain random data generation on SoC environment.
Should have good experience at IP, subsystem and SoC level verification.
Experience in writing assertions
Experience Functional coverage and code coverage
Test case development, simulation and debug
MUST -Good protocol knowledge of PHY/WIFI/DSP verification