Job Description :
Any visa/tax term

FPGA Design and Validation Engineer

Location: San Jose, CA

Salary after conversion - $90-110K/yr

Duration: 3 month contract to Hire

Interview Process: 1.Phone Screen with hiring manager 2.Full Day Onsite (4-5 other managers) 3.Start

Interview Ready: Now

We have a JO for a FPGA (Field Programmable Gate Array) Design and Validation Engineer. A field-programmable gate array (FPGA) is an integrated circuit (IC) that can be programmed in the field after manufacture. FPGAs are similar in principle to, but have vastly wider potential application than, programmable read-only memory (PROM) chips.

FPGA Design and Visual Engineer Roles
· Looking for depth and breadth of knowledge
· Mid-level (4-5 years)
· Skillset is more important than years of experience
· Passion for hardware

FPGA Design and Validation Engineer will be part of the Sensor SOC team that is designing and validating the next generation of sensor system on-chip products. The engineer will be primarily responsible for pre-silicon FPGA prototyping and validation of future client products. The role requires interfacing with digital design engineers to understand the design and then get it ready for FPGA prototyping, interfacing with sensor software engineers to capture the system level validation requirements in a validation test plan, and then execute the validation test plan on an FPGA board. Some FPGA specific mapping and RTL modules would also need to be created and maintained by the FPGA engineer.
Minimum Requirements:
- Masters in Electrical Engineering with at least four years of relevant experience.
- Expert in using Xilinx FPGA boards, tools and flows for prototyping and validating hardware.
- Lab and test equipment experience for debugging and validation.
- Experience with serial interface protocols such as I2C, SPI, I3C etc.
Additional requirements:
- Verilog RTL coding and debugging experience
- Static Timing Analysis expertise