Job Description :
Position: Design Engineering
Location: San Jose, CA
Interview: Phone & Skype
Duration: 12+ months with possibility of extension (s)

Skills: Design Engineering, HW blocks, Xtensa, Verilog RTL, Simulation, DMA controller/AXI interface, test plans, writing functional diagnostics, debugging failures.

Description:
Design Engineering Consultant’s duties:
Involved in development of HW blocks and their integration with the Xtensa core sub-system.
Using provided specifications as a guide, design and implementation of the the micro-architecture in Verilog RTL, Simulation and debug of its functions.
Synthesis, place & route and other EDA scripts to meet timing, area and power goals.
Involved in developing test plans, writing functional diagnostics, debugging failures and analyzing coverage information.
Development and maintenance of the specifications, (specifications are updated as the design evolves through the implementation process
Design blocks are: computer memory subsystems or computer arithmetic (for ex, fixed and floating-point logic) or DMA controller or AXI interface and fabric and associated state machines.


Client : N/A

             

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