Job Description :
Job Requirements
An expert level with developing UVM-based SV test-benches.
Highly experienced with defining block, sub-system and SOC top level test plans.
Relevant experience with one or more of PCIe, NVMe, NAND, DDR and CPU sub-systems.
Deep understanding and knowledge of verification methodologies, flows and quality metrics.
Great debugging and problem-solving skills.
Team player with great interpersonal communication skills.

Job Qualifications
At least 5 years of relevant experience in SoC verification.
Strong and relevant expertise with ASIC simulation tools and advanced verification methods.
Expert level in verification languages such as UVM and System Verilog.
Relevant experience with writing block-level and SoC test-plans.
Education: B.S. in electrical engineering, computer science with extensive industry experience.