Job Description :
Physical Design Engineer

Hudson , MA or Rochester , NY

FTE



             Expert in Synthesis to Tape-out flow, including Layout, DFT, Timing Closure, and Chip Finishing

             Ability to independently handle complex blocks to closure right from Synthesis

             Worked on at least 2 end to end projects those spanned across entire life cycle of development

             Ability to communicate with architecture, RTL design and other remote teams

             Excellent verbal and written communication skills

             Preferably experience in 20 nm, 14 nm flows

             Performing a wide range of back-end activities, including synthesis of RTL, DFT insertion, power optimization, Floor-planning, PnR (Place and Route), Clock Tree Synthesis (CTS), Timing closure (STA), DRC, LVS, Antenna checks, IR drop (RedHawk), multi voltage checks etc.

             Participating in the development of a back-end SoC design flow.

             Experience of UPF low power design through synthesis, place and route.

             Expertise in Synopsys suite (IC Compiler, Primetime, Design Compiler)

             Excellent people leadership skills, ability to lead/coordinate mult-site projects, strong communication and influencing skills required